 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| SSM2318GEN N-channel Enhancement-mode Power MOSFET PRODUCT SUMMARY BVDSS R DS(ON) ID DESCRIPTION The SSM2318GEN acheives fast switching performance with low gate charge without a complex drive circuit. It is suitable for low voltage applications such as DC/DC converters and general load-switching circuits. The SSM2318GEN is supplied in an RoHS-compliant SOT-23-3 package, which is widely used for lower power commercial and industrial surface mount applications. The gate has internal ESD protection. 30V 720m 1A Pb-free; RoHS-compliant SOT-23-3 D S SOT-23-3 G ABSOLUTE MAXIMUM RATINGS Symbol VDS VGS ID IDM PD TSTG TJ Parameter Drain-source voltage Gate-source voltage Continuous drain current Pulsed drain current 1,2 3 3 , Value 30 16 T A = 25C TA = 70C 1 800 2 1.38 0.01 -55 to 150 -55 to 150 Units V V A mA A W W/C C C Total power dissipation , TA = 25C Linear derating factor Storage temperature range Operating junction temperature range THERMAL CHARACTERISTICS Symbol RJA Parameter Maximum thermal resistance, junction-ambient 3 Value 90 Units C/W Notes: 1.Pulse width must be limited to avoid exceeding the maximum junction temperature of 150C. 2.Pulse width <300us, duty cycle <2%. 3.Mounted on a square inch of copper pad on FR4 board ; 270C/W when mounted on the minimum pad area required for soldering. 6/16/2006 Rev.3.01 www.SiliconStandard.com 1 of 5 SSM2318GEN ELECTRICAL CHARACTERISTICS Symbol BVDSS Parameter Drain-source breakdown voltage Breakdown voltage temperature coefficient (at Tj = 25C, unless otherwise specified) Test Conditions VGS=0V, ID=250uA Reference to 25C, ID=1mA VGS=4V, ID=500mA VGS=2.5V, ID=200mA 0.4 Min. 30 Typ. 0.04 725 1.1 0.4 0.4 17 44 45 55 30 12 11 Max. Units 720 1200 1.3 1 25 30 1.8 48 V V/C m m V mS uA uA uA nC nC nC ns ns ns ns pF pF pF BV DSS/Tj RDS(ON) Static drain-source on-resistance VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Gate threshold voltage Forward transconductance VDS=VGS, ID=250uA VDS=4V, ID=500mA Drain-source leakage current VDS=30V, VGS=0V VDS=24V ,VGS=0V, Tj = 70C VGS=16V ID=1A VDS=25V VGS=4.5V VDS=15V ID=1A RG=3.3 , VGS=5V RD=15 VGS=0V VDS=25V f=1.0MHz Gate-source leakage current Total gate charge 2 Gate-source charge Gate-drain ("Miller") charge Turn-on delay time Rise time Turn-off delay time Fall time Input capacitance Output capacitance Reverse transfer capacitance 2 Source-Drain Diode Symbol VSD Parameter Forward voltage 2 Test Conditions IS=1A, VGS=0V Min. - Typ. - Max. Units 1.3 V Notes: 1.Pulse width must be limited to avoid exceeding the maximum junction temperature of 150C. 2.Pulse width <300us, duty cycle <2%. 6/16/2006 Rev.3.01 www.SiliconStandard.com 2 of 5 SSM2318GEN 2.5 2.5 2.0 T A = 25 C o 5.0V 4.5V 4.0 V ID , Drain Current (A) TA=150 C 2.0 o 5.0V 4.5V 4.0 V ID , Drain Current (A) 1.5 1.5 1.0 1.0 2.5V 0.5 2.5V 0.5 V G = 1 .5V 0.0 0.0 2.0 4.0 6.0 0.0 0.0 2.0 4.0 V G = 1 .5V 6.0 V DS , Drain-to-Source Voltage (V) V DS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 3300 2.0 I D =200mA T A =25 o C 1.6 2300 I D =500mA V G =4V Normalized RDS(ON) RDS(ON) (m ) 1.2 1300 0.8 300 1 2 3 4 5 0.4 -50 0 50 100 150 V GS , Gate-to-Source Voltage (V) T j , Junction Temperature ( C) o Fig 3. On-Resistance vs. Gate Voltage Fig 4. Normalized On-Resistance vs. Junction Temperature 2.0 1.0 0.8 1.5 IS(A) 0.6 T j =150 o C 0.4 T j =25 o C Normalized VGS(th) (V) 1.0 0.5 0.2 0.0 0 0.2 0.4 0.6 0.8 1 1.2 0.0 -50 0 50 100 150 V SD , Source-to-Drain Voltage (V) T j , Junction Temperature ( o C) Fig 5. Forward Characteristic of Fig 6. Gate Threshold Voltage vs. Reverse Diode Junction Temperature 6/16/2006 Rev.3.01 www.SiliconStandard.com 3 of 5 SSM2318GEN f=1.0MHz 12 100 I D =1A VGS , Gate to Source Voltage (V) V DS =15V V DS =20V V DS =25V 9 C (pF) 6 C iss 3 C oss C rss 0 10 0.0 0.5 1.0 1.5 2.0 2.5 1 5 9 13 17 21 25 29 Q G , Total Gate Charge (nC) V DS , Drain-to-Source Voltage (V) Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics 10 1 Normalized Thermal Response (Rthja) Duty factor=0.5 1 0.2 ID (A) 10ms 0.1 0.1 PDM t 0.05 100ms 0.1 T Duty factor = t/T Peak Tj = PDM x Rthja + T a Rthja = 270C/W T A =25 o C Single Pulse 0.01 0.1 1 10 1s DC 100 0.01 Single Pulse 0.01 0.0001 0.001 0.01 0.1 1 10 100 V DS , Drain-to-Source Voltage (V) t , Pulse Width (s) Fig 9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance 2.0 V DS =5V 1.5 VG QG 4.5V ID , Drain Current (A) T j =25 o C 1.0 T j =150 o C QGS QGD 0.5 Charge 0.0 Q 0 2 4 6 V GS , Gate-to-Source Voltage (V) Fig 11. Transfer Characteristics Fig 12. Gate Charge Circuit 6/16/2006 Rev.3.01 www.SiliconStandard.com 4 of 5 SSM2318GEN PHYSICAL DIMENSIONS SOT-23-3 SOT-23-3 SYMBOL MILLIMETERS MIN. A A1 A2 b c D E E1 e e1 L L1 0 0.89 0 0.70 0.30 0.08 2.65 2.10 1.19 MAX. 1.45 0.15 1.30 0.50 0.25 3.10 3.00 2.30 0.95BSC 1.90BSC 0.30 0.60 0.60REF 8 PART MARKING *Dimensions do not include mold protrusions. PART NUMBER CODE: NM = SSM2318GEN NMXX First character is underlined to indicate Pb-free part XX = DATE/LOT CODE - contact SSC for information on decoding this. PACKING: Moisture sensitivity level MSL3 3000 pcs in antistatic tape on a reel packed in a moisture barrier bag (MBB). Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. 6/16/2006 Rev.3.01 www.SiliconStandard.com 5 of 5 |
Price & Availability of SSM2318GEN
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |